Position: Functional Safety Engineer for HW and SW – Intern
Location: San Jose CA US
design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration.
Our All Programmable devices underpin today’s most advanced electronics. Among the broad range of end markets we serve are:
- High Performance Computing
- Industrial / Scientific / Medical (ISM)
The activity consists in the development of an FMEDA (Failure Mode Effect and Diagnostic Analysis) of a MPSoC (Multi Processor System on Chip) related to our latest generation (16nm technology node).
The task consists in the setup of a database that allows Xilinx to claim the probability of failure of parts of the circuits and the capability of the implemented HW and SW safety mechanisms to detect those failures. It shall also help our customers to perform what-if analysis in case their design would or would not implement some embedded SW or other assumptions that we include in our FMEDA analysis.
It is required to have
– scripting (Python, Perl) and C programming capability
– understanding of HW architectures (ARM R and A CPU as a plus)
– understanding of embedded SW (ARM assembly as a plus)
– HW verification experience is a plus
Feb 21, 2017, 12:01:17 PM
Xilinx is an equal opportunity and affirmative action employer. Applicants and employees are treated throughout the employment process without regard to race, color, religion, national origin, citizenship, age, sex, marital status, ancestry, physical or mental disability, veteran status, gender Identity or sexual orientation. The self-identification information requested is not gathered for employment decisions. It is used only for compliance with US Federal laws. Your responses are strictly voluntary, and any information provided will remain confidential. If you choose not to “self-identify”, you will not be subject to any adverse treatment.
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